From Dholera to Sanand: Inside India’s Rapid Semiconductor OSAT and Fab Buildout
The concrete of Gujarat’s Sanand industrial belt is no longer just housing automobile assembly lines; it is actively printing commercial silicon revenues. In mid-2026, India’s semiconductor ambitions have transitioned from policy documents to high-volume manufacturing environments. Finished dynamic random-access memory (DRAM) and NAND flash modules are currently exiting cleanrooms in Gujarat, packaged, tested, and bound for global supply chains. Yet, this rapid backend expansion exposes a stark operational contrast between low-latency packaging lines and the brutal engineering physics of building a front-end commercial wafer fabrication plant from scratch.
The OSAT Vanguard: Why Sanand is Winning the Speed Run
Backend assembly, testing, marking, and packaging (ATMP) and Outsourced Semiconductor Assembly and Test (OSAT) facilities represent the low-hanging fruit of the India Semiconductor Mission. They require lower capital outlays, consume less water and power, and can be commissioned in a fraction of the time needed for a silicon foundry. This structural speed advantage is visible on the ground in Sanand.
Micron Technology’s $2.75 billion ATMP facility in Sanand officially commenced commercial production on February 28, 2026, marking the first major operational milestone of the current incentive cycle. The state-of-the-art facility, which will eventually feature over 500,000 square feet of cleanroom space, converts advanced DRAM and NAND wafers imported from Micron’s global manufacturing network into finished memory modules. Micron is already shipping India-assembled memory components to Dell Technologies for domestic laptop manufacturing, with plans to scale production from tens of millions of chips in 2026 to hundreds of millions in 2027.
A few kilometers away, CG Semi—a joint venture between India’s CG Power, Japan’s Renesas Electronics, and Thailand’s Stars Microelectronics—has matched this operational pace. CG Semi’s G1 facility commenced commercial production on July 4, 2026, shipping its initial batch of qualified chips to Renesas. Operating with an investment of ₹7,600 crore over five years, the G1 pilot line currently outputs approximately 500,000 chips per day, with the under-construction G2 facility expected to bring the joint venture’s total capacity to 15 million chips per day by the end of 2026. These chips serve mature, high-demand sectors: automotive microcontrollers, power applications, and smart energy meters like MosChip’s recently qualified VIDYUT100.
These rapid commissionings demonstrate that India can rapidly scale downstream assembly. However, these facilities remain structurally dependent on imported silicon. They do not manufacture chips; they package the dies fabricated in Taiwan, Japan, and the United States. The real test of India’s technological sovereignty lies 100 kilometers southwest, in the dusty plains of Dholera.
The Dholera Fab: The Brutal Physics of 300mm Silicon
Building a front-end wafer fabrication plant is an entirely different class of industrial engineering. Unlike an OSAT facility, a commercial fab requires sub-nanometer vibration controls, uninterrupted ultra-pure water systems, and massive, stable power grids. Tata Electronics, in partnership with Taiwan’s Powerchip Semiconductor Manufacturing Corporation (PSMC), is tackling this challenge with its ₹91,000 crore greenfield fab in the Dholera Special Investment Region.
Civil construction at the Dholera site is roughly 50 percent complete. While early government projections targeted a trial silicon run by late 2026, commercial production is officially guided to mid-2028. The facility is designed as a 300mm (12-inch) wafer fab with a target capacity of 50,000 wafer starts per month (WSPM). Rather than chasing leading-edge sub-5nm nodes dominated by TSMC and Samsung, Tata is targeting mature nodes between 28nm and 110nm—the workhorse nodes for automotive integrated circuits, display drivers, and power management units.
The operational friction in Dholera is not just about pouring concrete; it is about establishing a highly specialized chemical and equipment supply chain from zero. A single fab requires hundreds of high-purity gases and specialty chemicals. To mitigate this vulnerability, Tata Electronics signed 16 Memorandums of Understanding (MoUs) at Semicon India 2026. These agreements tie the Dholera fab to critical global suppliers, including lithography giant ASML, specialty chemical providers like Merck and JSR Corporation, and materials distributors like Sojitz. Securing these suppliers is critical; without localized access to ultra-pure wet chemicals and specialized industrial gases, the Dholera fab risks prolonged downtime and yield-rate stagnation.
The Assam Outpost: Securing the Packaging Pipeline
While Dholera focuses on the wafer, Tata Electronics is simultaneously constructing its own captive packaging pipeline. In Jagiroad, Assam, the company is investing ₹27,000 crore to build a greenfield OSAT facility targeted for commissioning by late 2026. Once operational, the Assam facility is designed to package up to 48 million chips per day using three key packaging platforms: wire bond, flip-chip, and a highly differentiated Integrated Systems Packaging (ISP) offering.
The strategic logic of the Assam plant is clear: it will act as the primary backend recipient of the wafers printed in Dholera. By controlling both the foundry in Gujarat and the packaging lines in Assam, Tata aims to offer global customers a fully integrated, domestic semiconductor manufacturing flow. This integration is vital for automotive and defense clients who demand strict supply chain traceability to prevent hardware-level exploits.
The Geopolitical Calculus of De-risking
This rapid capital deployment is fueled by a global rush to de-risk the silicon supply chain. Currently, over 80 percent of global semiconductor assembly and testing is concentrated in East Asia, primarily in China and Taiwan. Any cross-strait conflict or regional supply chain disruption would immediately freeze global electronics manufacturing.
By establishing operational packaging lines in Sanand and constructing a commercial foundry in Dholera, India is positioning itself as a politically neutral, geographically distinct alternative. The India Semiconductor Mission’s 50 percent capital subsidy has successfully offset the initial cost disabilities of operating in a region lacking a mature electronics component ecosystem. However, the long-term viability of these plants depends on yield optimization. In the semiconductor industry, a fraction of a percent difference in wafer yield represents the boundary between commercial profitability and systemic financial loss.
As the construction dust settles in Gujarat and Assam, the narrative is shifting from policy announcements to daily manufacturing yields. The operational success of Micron and CG Semi in Sanand proves that India can successfully package chips at scale. The ultimate test, however, will be whether the Dholera fab can pull off the transition from civil construction to stable, commercial-grade 300mm silicon fabrication by 2028.
